The window-type BGA (Ball Grid Array) package is a very common semiconductor package using a circuit substrate with a wire-bonding slot as a chip carrier. Normally, a semiconductor chip is disposed on the top surface of the board base and a plurality of external terminals such as solder balls are disposed on the bottom surface of the board base. Moreover, a plurality of bonding fingers are also disposed on the bottom surface of the board base. The chip is electrically connected to the bonding fingers of the substrate by a plurality of bonding wires passing through the wire-bonding slot.
As shown in FIG. 1, a circuit substrate 100 serves as a chip carrier for a conventional window-type BGA package. The circuit substrate 100 primarily comprises a board base 110, a plurality of bonding wires 20, and a plurality of external pads 160. The board base 110 has a top surface 111, a bottom surface 112, a wire-bonding slot 114 penetrating through the top surface 111 and the bottom surface 112. The bonding fingers 120 are disposed on the bottom surface 112 of the board base 110 and adjacent to both long sides of the wire-bonding slot 114. The external pads 160 are disposed on the bottom surface 112 of the board base 110 in an array.
As shown in FIG. 1, the conventional window-type BGA package further comprises a chip 10, a plurality of bonding wires 20, an encapsulant 30, and a plurality of solder balls 40. The chip 10 with a plurality of bonding pads 11 is attached to the top surface 111 of the board base 110 with the bonding wires 20 passing through the wire-bonding slot 114 to electrically connect the bonding pads 11 of the chip 10 to the bonding fingers 120 of the board base 110. An encapsulant 30 encapsulates the chip 10 and the bonding wires 20. The solder balls 40 are bonded to the external pads 160 as external terminals of the conventional window-type BGA package for SMT mounting on an external printed circuit board, not shown in the figure.
As shown in FIG. 2, a plurality of the substrates 100 are integrally formed and arranged in a substrate strip 50 before package singulation where the substrate strip 50 has a plurality of scribe lines 51 to define the dimensions of the substrates 100. Normally, Ni/Au or other metal layers will be plated on the surfaces of the bonding fingers 120 of the substrates 100 first to avoid oxidation of the bonding fingers 120 and to enhance the bonding strengths between the bonding fingers 120 and the bonding wires 20. Then, the wire-bonding slots 114 are formed by routing. As shown in FIG. 3, the bottom surface 112 of the board base 110 includes a slot-reserved area 113 corresponding to the wire-bonding slot 114 before routing. In order to plating the surfaces of the bonding fingers 120, a plating bus line 150 with a plurality of plating lines 140 is disposed on the bottom surface 112 of the board base 110 passing through the center of the slot-reserved area 113 where the plating lines 140 connect the bonding fingers 120 to the plating bus line 150. Since the plating lines 140 extend into the slot-reserved area 113 with certain lengths, therefore, the plating lines 140 will be pulled and shifted during routing the slot-reserved area 113 leading to metal burrs and shifting of the plating lines 140 remaining on the edges of the slot-reserved area 113 leading to electrical short between the bonding fingers 120. Furthermore, as shown in FIG. 3, the plating lines 140 extending through both long sides of the slot-reserved area 113 are straight lines perpendicular to the plating bus line 150 according to the position variation of the bonding fingers 120 leading to different spacing between the plating lines. Therefore, current density can not evenly distribute to every plating line 140 during plating processes causing different plating thicknesses plated on the surfaces of the bonding fingers 120 leading to poor plating qualities.